84 lines
No EOL
1.6 KiB
Makefile
84 lines
No EOL
1.6 KiB
Makefile
# Compiler and assembler
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CC = gcc
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AS = as
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LD = ld
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OBJDUMP = objdump
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SIZE = size
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CFLAGS += -std=c2x
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CFLAGS += -Wall
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CFLAGS += -Wextra
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CFLAGS += -Werror
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CFLAGS += -Wno-unused-parameter
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CFLAGS += -Wno-unused-variable
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CFLAGS += -Wno-unused-function
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CFLAGS += -Wno-unused-but-set-variable
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CFLAGS += -Wno-unused-value
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CFLAGS += -Wno-unused-label
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CFLAGS += -Wno-unused-result
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CFLAGS += -Wno-unused-local-typedefs
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CFLAGS += -Wno-unused-const-variable
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CFLAGS += -Wno-unused-macros
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CFLAGS += -O3
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CFLAGS += -g
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GITHASH = $(shell git rev-parse --short HEAD)
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# Specify the target binary (call it whatever)
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TARGET = build/program
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TARGET_TAR = $(TARGET)-$(GITHASH).tar.zst
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TARGET_SIG = $(TARGET_TAR).minisig
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SRCS := $(wildcard src/*.c)
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# Specify the object files in the build directory
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OBJS := $(patsubst src/%.c,build/%.o,$(SRCS))
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all: $(TARGET)
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# For convenience
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run: $(TARGET)
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@./$(TARGET)
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# Create the build directory
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mkbuilddir:
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@mkdir -p build
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# Link the object files into the target binary
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$(TARGET): $(OBJS)
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@$(CC) $(CFLAGS) -o $@ $^
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@echo -e "LD \t$^"
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# Compile the source files into object files
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build/%.o: src/%.c | mkbuilddir
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@$(CC) $(CFLAGS) -c -o $@ $< || (rm -f $@ && exit 1)
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@echo -e "CC \t$<"
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# Print the size of the target binary
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size: $(TARGET)
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$(SIZE) $(TARGET)
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# Format with clang-format
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format: $(SRCS)
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clang-format -i $^
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# Clean up the build directory
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clean:
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rm -r build
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rm -f build/*.o
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rm -f $(TARGET)*
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# Create a signed release
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tar: $(TARGET_TAR)
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# Sign the tar
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sign: $(TARGET_SIG)
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$(TARGET_SIG): $(TARGET_TAR)
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minisign -Sm $<
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$(TARGET_TAR): $(TARGET)
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strip $<
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tar --zstd -cvf $@ $<
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.PHONY: all clean size mkbuilddir run tar sign |