From 975ad1896af521d9e321e4da6552f2d1f05ff05f Mon Sep 17 00:00:00 2001 From: Imbus <> Date: Fri, 5 Apr 2024 19:53:44 +0200 Subject: [PATCH 1/3] Newlines --- end.s | 3 ++- main.s | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/end.s b/end.s index 07b6e36..96673e8 100644 --- a/end.s +++ b/end.s @@ -16,4 +16,5 @@ end: addi a0, x0, 0x0A sb a0, (a1) # '\n' - ret \ No newline at end of file + ret + diff --git a/main.s b/main.s index cbdd0b4..0483446 100644 --- a/main.s +++ b/main.s @@ -66,4 +66,5 @@ hello2: ecall # To avoid the program from exiting -loop: j loop \ No newline at end of file +loop: j loop + From e3082a19cb3d7d57016e3154123d285a5d601f05 Mon Sep 17 00:00:00 2001 From: Imbus <> Date: Fri, 5 Apr 2024 19:54:22 +0200 Subject: [PATCH 2/3] Formatting in makefile to avoid long cli arguments --- makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/makefile b/makefile index 33620fb..105c032 100644 --- a/makefile +++ b/makefile @@ -21,8 +21,8 @@ CFLAGS += -nostartfiles# # Do not use standard startup files CFLAGS += -nostdlib# # Do not use standard libraries CFLAGS += -fno-builtin# # Do not use built-in functions CFLAGS += -fno-common# # Do not use common sections -CFLAGS += -march=rv64i # Use RV64I ISA, i.e., integer only -CFLAGS += -mabi=lp64 # Use LP64 ABI, i.e., 64-bit longs and pointers, 32-bit ints +CFLAGS += -march=rv64i# # Use RV64I ISA, i.e., integer only +CFLAGS += -mabi=lp64# # Use LP64 ABI, i.e., 64-bit longs and pointers, 32-bit ints CFLAGS += -Os# # Optimize for size LDFLAGS += -T link.ld # Use the linker script From 86754df83bb49af306911ba25a0a0d4c11989f58 Mon Sep 17 00:00:00 2001 From: Imbus <> Date: Fri, 5 Apr 2024 19:54:32 +0200 Subject: [PATCH 3/3] More resources --- README.md | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/README.md b/README.md index 074d397..8aa796c 100644 --- a/README.md +++ b/README.md @@ -9,4 +9,9 @@ ### Misc +- [RISC-V From Scratch](https://github.com/twilco/riscv-from-scratch) + - [RISC-V from scratch 1: Introduction, toolchain setup, and hello world!](https://twilco.github.io/riscv-from-scratch/2019/03/10/riscv-from-scratch-1.html) + - [RISC-V from scratch 2: Hardware layouts, linker scripts, and C runtimes](https://twilco.github.io/riscv-from-scratch/2019/04/27/riscv-from-scratch-2.html) + - [RISC-V from scratch 3: Writing a UART driver in assembly](https://twilco.github.io/riscv-from-scratch/2019/07/08/riscv-from-scratch-3.html) + - [RISC-V from scratch 4: Creating a function prologue for our UART driver](https://twilco.github.io/riscv-from-scratch/2019/07/28/riscv-from-scratch-4.html) - [RISC-V Assembly Language Programming](https://github.com/rswinkle/riscv_book/)