Risc-V-Asm/link.ld
2024-04-05 18:27:06 +02:00

17 lines
293 B
Text

MEMORY {
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 1024
DRAM (rwx) : ORIGIN = 0x80000000, LENGTH = 1024
}
SECTIONS {
.text : {
main.o(.text.*)
*(.text)
} > DRAM
.data : {
*(.data)
} > DRAM AT > SRAM
.bss : {
*(.bss)
} > DRAM
}