Verilog/makefile
2024-04-01 10:40:00 +02:00

20 lines
352 B
Makefile

all: build/blinky.bin
build/blinky.bin: build/blinky.asc
icepack $< $@
build/blinky.asc: blinky.pcf build/blinky.blif
arachne-pnr -d 1k -P tq144 -o $@ -p $^
build/blinky.blif: blinky.v
mkdir -p build
yosys -p "synth_ice40 -top top -blif $@" $^
prog: build/blinky.bin
iceprog build/blinky.bin
clean:
rm build/*
.PHONY: prog clean