diff --git a/config.h b/config.h
index 5c778ee..8ddcbf4 100644
--- a/config.h
+++ b/config.h
@@ -2,7 +2,7 @@
  * Number of CPU's For now, this is hard-coded here. It will likely be
  * dynamically discovered in the future.
  */
-#define NCPU 3
+#define NCPU 4
 
 /* Maximum number of files open */
 #define NOFILE 10
diff --git a/kern/ispinlock.c b/kern/ispinlock.c
index 4a7b751..01965f8 100644
--- a/kern/ispinlock.c
+++ b/kern/ispinlock.c
@@ -19,7 +19,7 @@ void spin_unlock(spinlock_t *l) {
 
 // Optional: tiny pause/backoff (works even if Zihintpause isn't present).
 // See: https://github.com/riscv/riscv-isa-manual/blob/main/src/zihintpause.adoc
-void cpu_relax(void) {
+static inline void cpu_relax(void) {
 #if defined(__riscv_zihintpause)
     __asm__ volatile("pause");
 #else
diff --git a/kern/ispinlock.h b/kern/ispinlock.h
index e0303d6..d71af17 100644
--- a/kern/ispinlock.h
+++ b/kern/ispinlock.h
@@ -8,5 +8,4 @@ typedef struct {
 void spinlock_init(spinlock_t *l);
 bool spin_trylock(spinlock_t *l);
 void spin_unlock(spinlock_t *l);
-void cpu_relax(void);
 void spin_lock(spinlock_t *l);
diff --git a/start.c b/start.c
index 7f72faf..d0b47c5 100644
--- a/start.c
+++ b/start.c
@@ -18,9 +18,14 @@ char stack0[4096 * NCPU] __attribute__((aligned(16)));
 /* Keep this here and sync on it until we have synchronized printf */
 spinlock_t   sl = {0};
 volatile int hold = 1;
+volatile int max_hart = 0;
 
 /* This is where entry.S drops us of. All cores land here */
 void start() {
+    // Do this first
+    __sync_fetch_and_add(&max_hart, 1);
+    __sync_synchronize();
+
     u64 id = read_mhartid();
 
     // Keep each CPU's hartid in its tp (thread pointer) register, for cpuid().
@@ -35,15 +40,29 @@ void start() {
         uart_puts("Hello Neptune!\n");
         spinlock_init(&sl);
         hold = 0;
+    } else {
+        while (hold);
     }
 
-    while (hold);
+    // spin_lock(&sl);
+    //
+    // uart_puts("Hart number: ");
+    // uart_putc(id + '0');
+    // uart_putc('\n');
+    //
+    // spin_unlock(&sl);
 
-    spin_lock(&sl);
-    uart_puts("Hart number: ");
-    uart_putc(id + '0');
-    uart_putc('\n');
-    spin_unlock(&sl);
+    if (id == 0) {
+        spin_lock(&sl);
+        uart_puts("Core count: ");
+        uart_putc(max_hart + '0');
+        uart_putc('\n');
+        if (max_hart == NCPU) {
+            uart_puts("All cores up!");
+            uart_putc('\n');
+        }
+        spin_unlock(&sl);
+    }
 
     // We should not arrive here, but if we do, hang in a while on wfi.
     while (1) __asm__ volatile("wfi"); // (Wait For Interrupt)