69 lines
1.9 KiB
C
69 lines
1.9 KiB
C
#include <config.h>
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#include <ispinlock.h>
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#include <kalloc.h>
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#include <memory.h>
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#include <proc.h>
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#include <riscv.h>
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#include <types.h>
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#include <uart.h>
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/**
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* Allocate one stack per CPU (hart).
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* Each stack is 4096 bytes, aligned to 16 bytes for safety and performance.
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* The entry assembly code will calculate the proper stack address for the
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* current hart. For more info, read up on stack pointers and see: entry.S
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*/
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char stack0[4096 * NCPU] __attribute__((aligned(16)));
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/* Keep this here and sync on it until we have synchronized printf */
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spinlock_t sl = {0};
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volatile int hold = 1;
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volatile int max_hart = 0;
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/* This is where entry.S drops us of. All cores land here */
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void start() {
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// Do this first
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__sync_fetch_and_add(&max_hart, 1);
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__sync_synchronize();
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u64 id = read_mhartid();
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// Keep each CPU's hartid in its tp (thread pointer) register, for cpuid().
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// This can then be retrieved with r_wp or cpuid(). It is used to index the
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// cpus[] array in mycpu(), which in turn holds state for each individual
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// cpu (struct Cpu).
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write_tp(id);
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if (id == 0) {
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/* Here we will do a bunch of initialization steps */
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kalloc_init();
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uart_puts("Hello Neptune!\n");
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spinlock_init(&sl);
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hold = 0;
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} else {
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while (hold);
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}
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// spin_lock(&sl);
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//
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// uart_puts("Hart number: ");
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// uart_putc(id + '0');
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// uart_putc('\n');
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//
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// spin_unlock(&sl);
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if (id == 0) {
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spin_lock(&sl);
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uart_puts("Core count: ");
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uart_putc(max_hart + '0');
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uart_putc('\n');
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if (max_hart == NCPU) {
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uart_puts("All cores up!");
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uart_putc('\n');
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}
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spin_unlock(&sl);
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}
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// We should not arrive here, but if we do, hang in a while on wfi.
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while (1) __asm__ volatile("wfi"); // (Wait For Interrupt)
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}
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