Updating to zig master

Added cpu model


Moved logging to defer done log

Moved mem.init to bottom

Updated again to new zig master

src/kernel/arch/x86/gdt.zig

@@ -425,6 +425,7 @@ pub fn setTssStack(esp0: u32) void {
 ///
 pub fn init() void {
     log.logInfo("Init gdt\n", .{});
+    defer log.logInfo("Done gdt\n", .{});
     // Initiate TSS
     gdt_entries[TSS_INDEX] = makeEntry(@ptrToInt(&tss), @sizeOf(TtsEntry) - 1, TSS_SEGMENT, NULL_FLAGS);
 
@@ -437,8 +438,6 @@ pub fn init() void {
     // Load the TSS
     arch.ltr(TSS_OFFSET);
 
-    log.logInfo("Done\n", .{});
-
     if (build_options.rt_test) runtimeTests();
 }
 

src/kernel/arch/x86/idt.zig

@@ -180,11 +180,11 @@ pub fn openInterruptGate(index: u8, handler: InterruptHandler) IdtError!void {
 ///
 pub fn init() void {
     log.logInfo("Init idt\n", .{});
+    defer log.logInfo("Done idt\n", .{});
 
     idt_ptr.base = @ptrToInt(&idt_entries);
 
     arch.lidt(&idt_ptr);
-    log.logInfo("Done\n", .{});
 
     if (build_options.rt_test) runtimeTests();
 }

src/kernel/arch/x86/irq.zig

@@ -129,14 +129,13 @@ pub fn registerIrq(irq_num: u8, handler: IrqHandler) IrqError!void {
 ///
 pub fn init() void {
     log.logInfo("Init irq\n", .{});
+    defer log.logInfo("Done irq\n", .{});
 
     comptime var i = IRQ_OFFSET;
     inline while (i < IRQ_OFFSET + 16) : (i += 1) {
         openIrq(i, interrupts.getInterruptStub(i));
     }
 
-    log.logInfo("Done\n", .{});
-
     if (build_options.rt_test) runtimeTests();
 }
 

src/kernel/arch/x86/isr.zig

@@ -235,6 +235,7 @@ pub fn registerIsr(isr_num: u16, handler: IsrHandler) IsrError!void {
 ///
 pub fn init() void {
     log.logInfo("Init isr\n", .{});
+    defer log.logInfo("Done isr\n", .{});
 
     comptime var i = 0;
     inline while (i < 32) : (i += 1) {
@@ -243,8 +244,6 @@ pub fn init() void {
 
     openIsr(syscalls.INTERRUPT, interrupts.getInterruptStub(syscalls.INTERRUPT));
 
-    log.logInfo("Done\n", .{});
-
     if (build_options.rt_test) runtimeTests();
 }
 

src/kernel/arch/x86/paging.zig

@@ -293,6 +293,8 @@ fn pageFault(state: *arch.InterruptContext) void {
 ///
 pub fn init(mb_info: *multiboot.multiboot_info_t, mem_profile: *const MemProfile, allocator: *std.mem.Allocator) void {
     log.logInfo("Init paging\n", .{});
+    defer log.logInfo("Done paging\n", .{});
+
     // Calculate start and end of mapping
     const v_start = std.mem.alignBackward(@ptrToInt(mem_profile.vaddr_start), PAGE_SIZE_4KB);
     const v_end = std.mem.alignForward(@ptrToInt(mem_profile.vaddr_end) + mem_profile.fixed_alloc_size, PAGE_SIZE_4KB);
@@ -351,7 +353,6 @@ pub fn init(mb_info: *multiboot.multiboot_info_t, mem_profile: *const MemProfile
     isr.registerIsr(isr.PAGE_FAULT, if (options.rt_test) rt_pageFault else pageFault) catch |e| {
         panic(@errorReturnTrace(), "Failed to register page fault ISR: {}\n", .{e});
     };
-    log.logInfo("Done\n", .{});
 
     if (options.rt_test) runtimeTests(v_end);
 }
@@ -410,7 +411,7 @@ test "virtToTableEntryIdx" {
 }
 
 test "mapDirEntry" {
-    var allocator = std.heap.direct_allocator;
+    var allocator = std.heap.page_allocator;
     var dir: Directory = Directory{ .entries = [_]DirectoryEntry{0} ** ENTRIES_PER_DIRECTORY, .tables = [_]?*Table{null} ** ENTRIES_PER_DIRECTORY };
     var phys: usize = 0 * PAGE_SIZE_4MB;
     const phys_end: usize = phys + PAGE_SIZE_4MB;
@@ -425,7 +426,7 @@ test "mapDirEntry" {
 }
 
 test "mapDirEntry returns errors correctly" {
-    var allocator = std.heap.direct_allocator;
+    var allocator = std.heap.page_allocator;
     var dir = Directory{ .entries = [_]DirectoryEntry{0} ** ENTRIES_PER_DIRECTORY, .tables = undefined };
     testing.expectError(PagingError.UnalignedVirtAddresses, mapDirEntry(&dir, 1, PAGE_SIZE_4KB + 1, 0, PAGE_SIZE_4KB, allocator));
     testing.expectError(PagingError.UnalignedPhysAddresses, mapDirEntry(&dir, 0, PAGE_SIZE_4KB, 1, PAGE_SIZE_4KB + 1, allocator));
@@ -435,7 +436,7 @@ test "mapDirEntry returns errors correctly" {
 }
 
 test "mapDir" {
-    var allocator = std.heap.direct_allocator;
+    var allocator = std.heap.page_allocator;
     var dir = Directory{ .entries = [_]DirectoryEntry{0} ** ENTRIES_PER_DIRECTORY, .tables = [_]?*Table{null} ** ENTRIES_PER_DIRECTORY };
     const phys_start: usize = PAGE_SIZE_4MB * 2;
     const virt_start: usize = PAGE_SIZE_4MB * 4;

src/kernel/arch/x86/pic.zig

@@ -433,6 +433,7 @@ pub fn clearMask(irq_num: u8) void {
 ///
 pub fn init() void {
     log.logInfo("Init pic\n", .{});
+    defer log.logInfo("Done pic\n", .{});
 
     // Initiate
     sendCommandMaster(ICW1_INITIALISATION | ICW1_EXPECT_ICW4);
@@ -467,8 +468,6 @@ pub fn init() void {
     // Clear the IRQ for the slave
     clearMask(IRQ_CASCADE_FOR_SLAVE);
 
-    log.logInfo("Done\n", .{});
-
     if (build_options.rt_test) runtimeTests();
 }
 

src/kernel/arch/x86/pit.zig

@@ -371,6 +371,8 @@ pub fn getFrequency() u32 {
 ///
 pub fn init() void {
     log.logInfo("Init pit\n", .{});
+    defer log.logInfo("Done pit\n", .{});
+
     // Set up counter 0 at 10000hz in a square wave mode counting in binary
     const freq: u32 = 10000;
     setupCounter(CounterSelect.Counter0, freq, OCW_MODE_SQUARE_WAVE_GENERATOR | OCW_BINARY_COUNT_BINARY) catch |e| {
@@ -389,8 +391,6 @@ pub fn init() void {
         },
     };
 
-    log.logInfo("Done\n", .{});
-
     if (build_options.rt_test) runtimeTests();
 }
 

src/kernel/arch/x86/rtc.zig

@@ -252,6 +252,7 @@ fn enableInterrupts() void {
 ///
 pub fn init() void {
     log.logInfo("Init rtc\n", .{});
+    defer log.logInfo("Done rtc\n", .{});
 
     // Register the interrupt handler
     irq.registerIrq(pic.IRQ_REAL_TIME_CLOCK, rtcHandler) catch |err| switch (err) {
@@ -276,16 +277,12 @@ pub fn init() void {
     // Enable RTC interrupts
     enableInterrupts();
 
-    // Read status register C to clear any interrupts that may have happened during set up
-    //const reg_c = cmos.readStatusRegister(cmos.StatusRegister.C, false);
-
     // Can now enable interrupts
     arch.enableInterrupts();
 
+    // Read status register C to clear any interrupts that may have happened during set up
     const reg_c = cmos.readStatusRegister(cmos.StatusRegister.C, false);
 
-    log.logInfo("Done\n", .{});
-
     if (build_options.rt_test) runtimeTests();
 }
 

src/kernel/arch/x86/syscalls.zig

@@ -238,8 +238,9 @@ inline fn syscallArg(ctx: *arch.InterruptContext, comptime arg_idx: u32) u32 {
 ///
 pub fn init() void {
     log.logInfo("Init syscalls\n", .{});
+    defer log.logInfo("Done syscalls\n", .{});
+
     isr.registerIsr(INTERRUPT, handle) catch unreachable;
-    log.logInfo("Done\n", .{});
     if (options.rt_test) runtimeTests();
 }