diff --git a/src/kernel/arch/x86/cmos.zig b/src/kernel/arch/x86/cmos.zig
index 6151618..36e1c10 100644
--- a/src/kernel/arch/x86/cmos.zig
+++ b/src/kernel/arch/x86/cmos.zig
@@ -137,7 +137,7 @@ pub const RtcRegister = enum {
 ///     IN reg: u8                    - The register index to select in the CMOS chip.
 ///     IN comptime disable_nmi: bool - Whether to disable NMI when selecting a register.
 ///
-inline fn selectRegister(reg: u8, comptime disable_nmi: bool) void {
+fn selectRegister(reg: u8, comptime disable_nmi: bool) callconv(.Inline) void {
     if (disable_nmi) {
         arch.out(ADDRESS, reg | NMI_BIT);
     } else {
@@ -151,7 +151,7 @@ inline fn selectRegister(reg: u8, comptime disable_nmi: bool) void {
 /// Arguments:
 ///     IN data: u8 - The data to write to the selected register.
 ///
-inline fn writeRegister(data: u8) void {
+fn writeRegister(data: u8) callconv(.Inline) void {
     arch.out(DATA, data);
 }
 
@@ -161,7 +161,7 @@ inline fn writeRegister(data: u8) void {
 /// Return: u8
 ///     The value in the selected register.
 ///
-inline fn readRegister() u8 {
+fn readRegister() callconv(.Inline) u8 {
     return arch.in(u8, DATA);
 }
 
@@ -176,7 +176,7 @@ inline fn readRegister() u8 {
 /// Return: u8
 ///     The value in the selected register.
 ///
-inline fn selectAndReadRegister(reg: u8, comptime disable_nmi: bool) u8 {
+fn selectAndReadRegister(reg: u8, comptime disable_nmi: bool) callconv(.Inline) u8 {
     selectRegister(reg, disable_nmi);
     arch.ioWait();
     return readRegister();
@@ -191,7 +191,7 @@ inline fn selectAndReadRegister(reg: u8, comptime disable_nmi: bool) u8 {
 ///     IN data: u8                   - The data to write to the selected register.
 ///     IN comptime disable_nmi: bool - Whether to disable NMI when selecting a register.
 ///
-inline fn selectAndWriteRegister(reg: u8, data: u8, comptime disable_nmi: bool) void {
+fn selectAndWriteRegister(reg: u8, data: u8, comptime disable_nmi: bool) callconv(.Inline) void {
     selectRegister(reg, disable_nmi);
     arch.ioWait();
     writeRegister(data);
diff --git a/src/kernel/arch/x86/isr.zig b/src/kernel/arch/x86/isr.zig
index 641db84..e630d79 100644
--- a/src/kernel/arch/x86/isr.zig
+++ b/src/kernel/arch/x86/isr.zig
@@ -160,7 +160,7 @@ export fn isrHandler(ctx: *arch.CpuState) usize {
                 ret_esp = handler(ctx);
             } else {
                 log.info("State: {X}\n", .{ctx});
-                panic(@errorReturnTrace(), "ISR {} ({}) triggered with error code 0x{X} but not registered\n", .{ exception_msg[isr_num], isr_num, ctx.error_code });
+                panic(@errorReturnTrace(), "ISR {s} ({}) triggered with error code 0x{X} but not registered\n", .{ exception_msg[isr_num], isr_num, ctx.error_code });
             }
         }
     } else {
diff --git a/src/kernel/arch/x86/paging.zig b/src/kernel/arch/x86/paging.zig
index 0a5ac76..d350357 100644
--- a/src/kernel/arch/x86/paging.zig
+++ b/src/kernel/arch/x86/paging.zig
@@ -150,7 +150,7 @@ pub var kernel_directory: Directory align(@truncate(u29, PAGE_SIZE_4KB)) = Direc
 /// Return: usize
 ///     The index into an array of directory entries.
 ///
-inline fn virtToDirEntryIdx(virt: usize) usize {
+fn virtToDirEntryIdx(virt: usize) callconv(.Inline) usize {
     return virt / PAGE_SIZE_4MB;
 }
 
@@ -163,7 +163,7 @@ inline fn virtToDirEntryIdx(virt: usize) usize {
 /// Return: usize
 ///     The index into an array of table entries.
 ///
-inline fn virtToTableEntryIdx(virt: usize) usize {
+fn virtToTableEntryIdx(virt: usize) callconv(.Inline) usize {
     return (virt / PAGE_SIZE_4KB) % ENTRIES_PER_TABLE;
 }
 
@@ -174,7 +174,7 @@ inline fn virtToTableEntryIdx(virt: usize) usize {
 ///     val: *align(1) u32 - The entry to modify
 ///     attr: u32 - The bits corresponding to the attribute to set
 ///
-inline fn setAttribute(val: *align(1) u32, attr: u32) void {
+fn setAttribute(val: *align(1) u32, attr: u32) callconv(.Inline) void {
     val.* |= attr;
 }
 
@@ -185,7 +185,7 @@ inline fn setAttribute(val: *align(1) u32, attr: u32) void {
 ///     val: *align(1) u32 - The entry to modify
 ///     attr: u32 - The bits corresponding to the attribute to clear
 ///
-inline fn clearAttribute(val: *align(1) u32, attr: u32) void {
+fn clearAttribute(val: *align(1) u32, attr: u32) callconv(.Inline) void {
     val.* &= ~attr;
 }
 
diff --git a/src/kernel/arch/x86/pic.zig b/src/kernel/arch/x86/pic.zig
index ecdd0af..ff5a97f 100644
--- a/src/kernel/arch/x86/pic.zig
+++ b/src/kernel/arch/x86/pic.zig
@@ -251,7 +251,7 @@ var spurious_irq_counter: u32 = 0;
 /// Arguments:
 ///     IN cmd: u8 - The command to send.
 ///
-inline fn sendCommandMaster(cmd: u8) void {
+fn sendCommandMaster(cmd: u8) callconv(.Inline) void {
     arch.out(MASTER_COMMAND_REG, cmd);
 }
 
@@ -261,7 +261,7 @@ inline fn sendCommandMaster(cmd: u8) void {
 /// Arguments:
 ///     IN cmd: u8 - The command to send.
 ///
-inline fn sendCommandSlave(cmd: u8) void {
+fn sendCommandSlave(cmd: u8) callconv(.Inline) void {
     arch.out(SLAVE_COMMAND_REG, cmd);
 }
 
@@ -271,7 +271,7 @@ inline fn sendCommandSlave(cmd: u8) void {
 /// Arguments:
 ///     IN data: u8 - The data to send.
 ///
-inline fn sendDataMaster(data: u8) void {
+fn sendDataMaster(data: u8) callconv(.Inline) void {
     arch.out(MASTER_DATA_REG, data);
 }
 
@@ -281,7 +281,7 @@ inline fn sendDataMaster(data: u8) void {
 /// Arguments:
 ///     IN data: u8 - The data to send.
 ///
-inline fn sendDataSlave(data: u8) void {
+fn sendDataSlave(data: u8) callconv(.Inline) void {
     arch.out(SLAVE_DATA_REG, data);
 }
 
@@ -291,7 +291,7 @@ inline fn sendDataSlave(data: u8) void {
 /// Return: u8
 ///     The data that is stored in the master data register.
 ///
-inline fn readDataMaster() u8 {
+fn readDataMaster() callconv(.Inline) u8 {
     return arch.in(u8, MASTER_DATA_REG);
 }
 
@@ -301,7 +301,7 @@ inline fn readDataMaster() u8 {
 /// Return: u8
 ///     The data that is stored in the salve data register.
 ///
-inline fn readDataSlave() u8 {
+fn readDataSlave() callconv(.Inline) u8 {
     return arch.in(u8, SLAVE_DATA_REG);
 }
 
@@ -311,7 +311,7 @@ inline fn readDataSlave() u8 {
 /// Return: u8
 ///     The data that is stored in the master IRR.
 ///
-inline fn readMasterIrr() u8 {
+fn readMasterIrr() callconv(.Inline) u8 {
     sendCommandMaster(OCW3_DEFAULT | OCW3_ACT_ON_READ | OCW3_READ_IRR);
     return arch.in(u8, MASTER_STATUS_REG);
 }
@@ -322,7 +322,7 @@ inline fn readMasterIrr() u8 {
 /// Return: u8
 ///     The data that is stored in the slave IRR.
 ///
-inline fn readSlaveIrr() u8 {
+fn readSlaveIrr() callconv(.Inline) u8 {
     sendCommandSlave(OCW3_DEFAULT | OCW3_ACT_ON_READ | OCW3_READ_IRR);
     return arch.in(u8, SLAVE_STATUS_REG);
 }
@@ -333,7 +333,7 @@ inline fn readSlaveIrr() u8 {
 /// Return: u8
 ///     The data that is stored in the master ISR.
 ///
-inline fn readMasterIsr() u8 {
+fn readMasterIsr() callconv(.Inline) u8 {
     sendCommandMaster(OCW3_DEFAULT | OCW3_ACT_ON_READ | OCW3_READ_ISR);
     return arch.in(u8, MASTER_STATUS_REG);
 }
@@ -344,7 +344,7 @@ inline fn readMasterIsr() u8 {
 /// Return: u8
 ///     The data that is stored in the slave ISR.
 ///
-inline fn readSlaveIsr() u8 {
+fn readSlaveIsr() callconv(.Inline) u8 {
     sendCommandSlave(OCW3_DEFAULT | OCW3_ACT_ON_READ | OCW3_READ_ISR);
     return arch.in(u8, SLAVE_STATUS_REG);
 }
diff --git a/src/kernel/arch/x86/pit.zig b/src/kernel/arch/x86/pit.zig
index c845036..fd3736c 100644
--- a/src/kernel/arch/x86/pit.zig
+++ b/src/kernel/arch/x86/pit.zig
@@ -198,7 +198,7 @@ var time_under_1_ns: u32 = undefined;
 /// Arguments:
 ///     IN cmd: u8 - The command to send to the PIT.
 ///
-inline fn sendCommand(cmd: u8) void {
+fn sendCommand(cmd: u8) callconv(.Inline) void {
     arch.out(COMMAND_REGISTER, cmd);
 }
 
@@ -211,7 +211,7 @@ inline fn sendCommand(cmd: u8) void {
 /// Return: u8
 ///     The mode the counter is operating in. Use the masks above to get each part.
 ///
-inline fn readBackCommand(counter: CounterSelect) u8 {
+fn readBackCommand(counter: CounterSelect) callconv(.Inline) u8 {
     sendCommand(0xC2);
     return 0x3F & arch.in(u8, counter.getRegister());
 }
@@ -223,7 +223,7 @@ inline fn readBackCommand(counter: CounterSelect) u8 {
 ///     IN counter: CounterSelect - The counter port to send the data to.
 ///     IN data: u8               - The data to send.
 ///
-inline fn sendDataToCounter(counter: CounterSelect, data: u8) void {
+fn sendDataToCounter(counter: CounterSelect, data: u8) callconv(.Inline) void {
     arch.out(counter.getRegister(), data);
 }
 
diff --git a/src/kernel/arch/x86/syscalls.zig b/src/kernel/arch/x86/syscalls.zig
index b26fe0a..63f67e3 100644
--- a/src/kernel/arch/x86/syscalls.zig
+++ b/src/kernel/arch/x86/syscalls.zig
@@ -112,7 +112,7 @@ pub fn registerSyscall(syscall: usize, handler: Handler) Error!void {
 /// Error: syscalls.Error
 ///     This function will return the error that the syscall handler returns. See the documentation for the syscall for details.
 ///
-inline fn syscall0(syscall: usize) syscalls.Error!usize {
+fn syscall0(syscall: usize) callconv(.Inline) syscalls.Error!usize {
     const res = asm volatile (
         \\int $0x80
         : [ret] "={eax}" (-> usize)
@@ -141,7 +141,7 @@ inline fn syscall0(syscall: usize) syscalls.Error!usize {
 /// Error: syscalls.Error
 ///     This function will return the error that the syscall handler returns. See the documentation for the syscall for details.
 ///
-inline fn syscall1(syscall: usize, arg: usize) syscalls.Error!usize {
+fn syscall1(syscall: usize, arg: usize) callconv(.Inline) syscalls.Error!usize {
     const res = asm volatile (
         \\int $0x80
         : [ret] "={eax}" (-> usize)
@@ -171,7 +171,7 @@ inline fn syscall1(syscall: usize, arg: usize) syscalls.Error!usize {
 /// Error: syscalls.Error
 ///     This function will return the error that the syscall handler returns. See the documentation for the syscall for details.
 ///
-inline fn syscall2(syscall: usize, arg1: usize, arg2: usize) syscalls.Error!usize {
+fn syscall2(syscall: usize, arg1: usize, arg2: usize) callconv(.Inline) syscalls.Error!usize {
     const res = asm volatile (
         \\int $0x80
         : [ret] "={eax}" (-> usize)
@@ -203,7 +203,7 @@ inline fn syscall2(syscall: usize, arg1: usize, arg2: usize) syscalls.Error!usiz
 /// Error: syscalls.Error
 ///     This function will return the error that the syscall handler returns. See the documentation for the syscall for details.
 ///
-inline fn syscall3(syscall: usize, arg1: usize, arg2: usize, arg3: usize) syscalls.Error!usize {
+fn syscall3(syscall: usize, arg1: usize, arg2: usize, arg3: usize) callconv(.Inline) syscalls.Error!usize {
     const res = asm volatile (
         \\int $0x80
         : [ret] "={eax}" (-> usize)
@@ -237,7 +237,7 @@ inline fn syscall3(syscall: usize, arg1: usize, arg2: usize, arg3: usize) syscal
 /// Error: syscalls.Error
 ///     This function will return the error that the syscall handler returns. See the documentation for the syscall for details.
 ///
-inline fn syscall4(syscall: usize, arg1: usize, arg2: usize, arg3: usize, arg4: usize) syscalls.Error!usize {
+fn syscall4(syscall: usize, arg1: usize, arg2: usize, arg3: usize, arg4: usize) callconv(.Inline) syscalls.Error!usize {
     const res = asm volatile (
         \\int $0x80
         : [ret] "={eax}" (-> usize)
@@ -273,7 +273,7 @@ inline fn syscall4(syscall: usize, arg1: usize, arg2: usize, arg3: usize, arg4:
 /// Error: syscalls.Error
 ///     This function will return the error that the syscall handler returns. See the documentation for the syscall for details.
 ///
-inline fn syscall5(syscall: usize, arg1: usize, arg2: usize, arg3: usize, arg4: usize, arg5: usize) syscalls.Error!usize {
+fn syscall5(syscall: usize, arg1: usize, arg2: usize, arg3: usize, arg4: usize, arg5: usize) callconv(.Inline) syscalls.Error!usize {
     const res = asm volatile (
         \\int $0x80
         : [ret] "={eax}" (-> usize)
@@ -304,7 +304,7 @@ inline fn syscall5(syscall: usize, arg1: usize, arg2: usize, arg3: usize, arg4:
 /// Return: usize
 ///     The syscall argument from the given index.
 ///
-inline fn syscallArg(ctx: *arch.CpuState, comptime arg_idx: u32) usize {
+fn syscallArg(ctx: *arch.CpuState, comptime arg_idx: u32) callconv(.Inline) usize {
     return switch (arg_idx) {
         0 => ctx.ebx,
         1 => ctx.ecx,
diff --git a/src/kernel/arch/x86/vga.zig b/src/kernel/arch/x86/vga.zig
index 4b4fd27..fc63f4b 100644
--- a/src/kernel/arch/x86/vga.zig
+++ b/src/kernel/arch/x86/vga.zig
@@ -121,7 +121,7 @@ var cursor_scanline_end: u8 = undefined;
 ///     IN index: u8 - The index to send to the port address to select the register to write data
 ///                    to.
 ///
-inline fn sendPort(index: u8) void {
+fn sendPort(index: u8) callconv(.Inline) void {
     arch.out(PORT_ADDRESS, index);
 }
 
@@ -131,7 +131,7 @@ inline fn sendPort(index: u8) void {
 /// Arguments:
 ///     IN data: u8 - The data to send to the selected register.
 ///
-inline fn sendData(data: u8) void {
+fn sendData(data: u8) callconv(.Inline) void {
     arch.out(PORT_DATA, data);
 }
 
@@ -141,7 +141,7 @@ inline fn sendData(data: u8) void {
 /// Return: u8
 ///     The data in the selected register.
 ///
-inline fn getData() u8 {
+fn getData() callconv(.Inline) u8 {
     return arch.in(u8, PORT_DATA);
 }
 ///
@@ -152,7 +152,7 @@ inline fn getData() u8 {
 //                     data to.
 ///     IN data: u8 - The data to send to the selected register.
 ///
-inline fn sendPortData(index: u8, data: u8) void {
+fn sendPortData(index: u8, data: u8) callconv(.Inline) void {
     sendPort(index);
     sendData(data);
 }
@@ -167,7 +167,7 @@ inline fn sendPortData(index: u8, data: u8) void {
 /// Return: u8
 ///     The data in the selected register.
 ///
-inline fn getPortData(index: u8) u8 {
+fn getPortData(index: u8) callconv(.Inline) u8 {
     sendPort(index);
     return getData();
 }
diff --git a/src/kernel/tty.zig b/src/kernel/tty.zig
index 9bbe4f6..e40db3b 100644
--- a/src/kernel/tty.zig
+++ b/src/kernel/tty.zig
@@ -88,7 +88,7 @@ pub fn clear() void {
         spaces[col] = "\n"[0];
         var row: u8 = 0;
         while (row < tty.rows) : (row += 1) {
-            print("{}", .{spaces});
+            print("{s}", .{spaces});
         }
         tty.setCursor(0, 0);
     }
diff --git a/test/mock/kernel/mock_framework_template.zig b/test/mock/kernel/mock_framework_template.zig
index 7da3182..a7a8045 100644
--- a/test/mock/kernel/mock_framework_template.zig
+++ b/test/mock/kernel/mock_framework_template.zig
@@ -389,7 +389,7 @@ fn Mock() type {
                     switch (action.action) {
                         ActionType.TestValue, ActionType.ConsumeFunctionCall => {
                             // These need to be all consumed
-                            std.debug.panic("Unused testing value: Type: {}, value: {} for function '{}'\n", .{ action.action, @as(DataElementType, action.data), next.key });
+                            std.debug.panic("Unused testing value: Type: {}, value: {} for function '{s}'\n", .{ action.action, @as(DataElementType, action.data), next.key });
                         },
                         ActionType.RepeatFunctionCall => {
                             // As this is a repeat action, the function will still be here
diff --git a/test/runtime_test.zig b/test/runtime_test.zig
index 2d44bbd..c8b5c8f 100644
--- a/test/runtime_test.zig
+++ b/test/runtime_test.zig
@@ -299,7 +299,7 @@ pub const RuntimeStep = struct {
     pub fn create(builder: *Builder, test_mode: TestMode, qemu_args: [][]const u8) *RuntimeStep {
         const runtime_step = builder.allocator.create(RuntimeStep) catch unreachable;
         runtime_step.* = RuntimeStep{
-            .step = Step.init(.Custom, builder.fmt("Runtime {}", .{@tagName(test_mode)}), builder.allocator, make),
+            .step = Step.init(.Custom, builder.fmt("Runtime {s}", .{@tagName(test_mode)}), builder.allocator, make),
             .builder = builder,
             .msg_queue = Queue.init(),
             .os_proc = undefined,