6 commits

Author	SHA1	Message	Date
DrDeano	7ab180f622	Added RTC ... Added I/O waits to PIC remapping Added fmt step to build When building will format all the code to the standard Fixed cascading interrupts Re-named to selectAnd*Register. Moved switching on registers into emun Removed build fmt step	2020-01-15 19:50:47 +00:00
Sam Tebbs	91b2a61acf	Update code to work with zig master	2020-01-06 14:28:09 +00:00
Sam Tebbs	7b2d4c1190	Fix T() style casts	2019-11-10 22:07:20 +00:00
ED	2a0c2e4708	Added unit tests for PIC ... Removed I/O wait as it isn't needed and uses the syscall interrupt. Added runtime tests Fixed styling for TTY Fixed runtime tests Now they are fixed	2019-10-01 17:59:42 +01:00
ED	1e951691a9	Added PIT interface ... Ready for PR Code review changes Minor changes	2019-06-26 18:42:38 +01:00
ED	1fc534b9a4	Added the PIC interface ... Also added doc comments to functions	2019-06-02 17:14:02 +01:00