DrDeano 7ab180f622 Added RTC ... Added I/O waits to PIC remapping Added fmt step to build When building will format all the code to the standard Fixed cascading interrupts Re-named to selectAnd*Register. Moved switching on registers into emun Removed build fmt step		2020-01-15 19:50:47 +00:00
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kernel/arch/x86	Added RTC	2020-01-15 19:50:47 +00:00
mock/kernel	Added RTC	2020-01-15 19:50:47 +00:00
rt-test.py	Add a physical memory manager	2020-01-09 12:47:05 +00:00