library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity Interrupt_Handler is
    Port (
        clk         : in STD_LOGIC;                 -- Clock input
        rst         : in STD_LOGIC;                 -- Reset input
        int0        : in STD_LOGIC;                 -- Input interrupt request signal
        int_done    : in STD_LOGIC;                 -- Input signal indicating interrupt processing is done
        ret_addr    : in STD_LOGIC_VECTOR(3 downto 0);  -- Input return address
        int_addr    : out STD_LOGIC_VECTOR(3 downto 0);  -- Output interrupt address
        int_mux     : out STD_LOGIC;                -- Output interrupt multiplexer control signal
        save_wreg   : out STD_LOGIC;                -- Output signal to save work register content
        restore_wreg: out STD_LOGIC                 -- Output signal to restore work register content
    );
end Interrupt_Handler;

architecture Behavioral of Interrupt_Handler is
    signal pending_interrupt : STD_LOGIC := '0';  -- Internal signal to track pending interrupts

begin
    -- Reset logic
    process (rst)
    begin
        if rst = '1' then
            pending_interrupt <= '0';  -- Clear pending interrupt on reset
        end if;
    end process;

    -- Logic to detect an interrupt request
    process (int0, int_done)
    begin
        if int0 = '1' and int_done = '0' then
            pending_interrupt <= '1';  -- Set pending_interrupt to indicate a new interrupt request
        else
            pending_interrupt <= '0';
        end if;
    end process;

    -- Interrupt address generation logic (you can modify this as needed)
    -- For simplicity, this example just assigns an address based on the presence of a pending interrupt.
    process (pending_interrupt)
    begin
        if pending_interrupt = '1' then
            int_addr <= "0000";  -- Set the interrupt address
        else
            int_addr <= (others => '0');  -- No interrupt pending, so address is all zeros
        end if;
    end process;

    -- Interrupt multiplexer control logic (you can modify this as needed)
    -- For simplicity, this example enables the multiplexer only if there's a pending interrupt.
    process (pending_interrupt)
    begin
        if pending_interrupt = '1' then
            int_mux <= '1';  -- Enable the multiplexer
        else
            int_mux <= '0';  -- Disable the multiplexer
        end if;
    end process;

    -- Save and restore work register control signals (you can modify this as needed)
    -- For simplicity, this example sets save_wreg when an interrupt is pending and
    -- restore_wreg when interrupt processing is done.
    process (pending_interrupt, int_done)
    begin
        save_wreg <= pending_interrupt;
        restore_wreg <= int_done;
    end process;

end Behavioral;