library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity Instruction_Decoder is
    Port (
        opcode   : in STD_LOGIC_VECTOR(3 downto 0);  -- Input opcode
        z_flag   : in STD_LOGIC;                      -- Input zero flag
        IntDone  : in STD_LOGIC;                      -- Input interrupt done signal
        stackOp  : out STD_LOGIC;                     -- Output stack operation signal
        addrSrc  : out STD_LOGIC_VECTOR(1 downto 0);  -- Output address source select
        ALUOp    : out STD_LOGIC_VECTOR(2 downto 0);  -- Output ALU operation select
        ALUSrc   : out STD_LOGIC;                     -- Output ALU source select
        regEna   : out STD_LOGIC;                     -- Output register enable signal
        OutEna   : out STD_LOGIC                      -- Output data output enable signal
    );
end Instruction_Decoder;

architecture Behavioral of Instruction_Decoder is
begin
    process (opcode, z_flag, IntDone)
    begin
        -- Initialize outputs to default values
        stackOp <= '0';
        addrSrc <= "00";
        ALUOp <= "000";
        ALUSrc <= '0';
        regEna <= '0';
        OutEna <= '0';

        -- Decode instructions based on opcode [12:9]
        case opcode is
            when "0000" =>
                stackOp <= '1';  -- Instruction 0000: Push onto stack
            when "0001" =>
                stackOp <= '0';  -- Instruction 0001: Pop from stack
            when "0010" =>
                addrSrc <= "01";  -- Instruction 0010: Load address from register
                regEna <= '1';
                OutEna <= '1';
            when "0011" =>
                ALUOp <= "001";  -- Instruction 0011: ALU operation ADD
                ALUSrc <= '1';
                OutEna <= '1';
            when "0100" =>
                ALUOp <= "010";  -- Instruction 0100: ALU operation SUB
                ALUSrc <= '1';
                OutEna <= '1';
            when "0101" =>
                ALUOp <= "011";  -- Instruction 0101: ALU operation AND
                ALUSrc <= '1';
                OutEna <= '1';
            when "0110" =>
                ALUOp <= "100";  -- Instruction 0110: ALU operation OR
                ALUSrc <= '1';
                OutEna <= '1';
            when "0111" =>
                ALUOp <= "101";  -- Instruction 0111: ALU operation XOR
                ALUSrc <= '1';
                OutEna <= '1';
            when "1000" =>
                if z_flag = '1' then
                    addrSrc <= "10";  -- Instruction 1000: Jump if Zero (JZ)
                else
                    addrSrc <= "11";  -- Instruction 1000: Jump if Not Zero (JNZ)
                end if;
            when others =>
                null;  -- Other instructions not specified, outputs remain at default values
        end case;
    end process;
end Behavioral;