In-source documentation of sepc and scause instructions

kernel/riscv.h

@@ -161,9 +161,17 @@ w_mie(u64 x)
   asm volatile("csrw mie, %0" : : "r"(x));
 }
 
-// supervisor exception program counter, holds the
+// The supervisor exception program counter holds the
 // instruction address to which a return from
 // exception will go.
+//
+// It is automatically set when an exception occurs.
+// It can also be set with the w_sepc() function.
+// (A wrapper for csrw sepc, x)
+//
+// Information related to the cause of the exception
+// will be in the scause register. Readable with the
+// r_scause() defined below.
 
 /** Write Supervisor Exception Program Counter */
 static inline void