Imbus/xv6-riscv-kernel
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display assembly instructions, to help with first.tex exercise

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This commit is contained in:
Robert Morris 2019-07-24 10:15:45 -04:00
parent 49db5119e9
commit 8f6865d1f1
3 changed files with 3 additions and 1 deletions
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.gdbinit.tmpl-riscv
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@ -2,3 +2,4 @@ set confirm off
set architecture riscv
target remote 127.0.0.1:1234
symbol-file kernel/kernel
set disassemble-next-line auto