Incorporate new understanding of/with Intel SMP spec.
Dropped cmpxchg in favor of xchg, to match lecture notes. Use xchg to release lock, for future protection and to keep gcc from acting clever.
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@ -102,5 +102,11 @@ after observing the earlier writes by CPU0.
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So any reads in B are guaranteed to observe the
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effects of writes in A.
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Not sure about the second one yet.
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According to the Intel manual behavior spec, the
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second condition requires a serialization instruction
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in release, to avoid reads in A happening after giving
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up lk. No Intel SMP processor in existence actually
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moves reads down after writes, but the language in
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the spec allows it. There is no telling whether future
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processors will need it.
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