Imbus/xv6-riscv-kernel
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spacing fixes: no tabs, 2-space indents (for rtm)

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rsc 2006-09-06 17:04:06 +00:00
parent 45854caa93
commit a650c606fe
33 changed files with 913 additions and 905 deletions
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1
asm.h
View file

@ -5,6 +5,7 @@
#define SEG_NULLASM \
.word 0, 0; \
.byte 0, 0, 0, 0
#define SEG_ASM(type,base,lim) \
.word (((lim) >> 12) & 0xffff), ((base) & 0xffff); \
.byte (((base) >> 16) & 0xff), (0x90 | (type)), \

17
bootasm.S
View file

@ -18,7 +18,8 @@
###################################################################################
.globl start # Entry point
start: .code16 # This runs in real mode
start:
.code16 # This runs in real mode
cli # Disable interrupts
cld # String operations increment
@ -39,12 +40,15 @@ start: .code16 # This runs in real mode
#### Obviously this a bit of a drag for us, especially when trying to
#### address memory above 1MB. This code undoes this.
seta20.1: inb $0x64,%al # Get status
seta20.1:
inb $0x64,%al # Get status
testb $0x2,%al # Busy?
jnz seta20.1 # Yes
movb $0xd1,%al # Command: Write
outb %al,$0x64 # output port
seta20.2: inb $0x64,%al # Get status
seta20.2:
inb $0x64,%al # Get status
testb $0x2,%al # Busy?
jnz seta20.2 # Yes
movb $0xdf,%al # Enable
@ -60,7 +64,8 @@ seta20.2: inb $0x64,%al # Get status
#### This initial NOP-translation setup is required by the processor
#### to ensure that the transition to protected mode occurs smoothly.
real_to_prot: cli # Mandatory since we dont set up an IDT
real_to_prot:
cli # Mandatory since we dont set up an IDT
lgdt gdtdesc # load GDT -- mandatory in protected mode
movl %cr0, %eax # turn on protected mode
orl $CR0_PE_ON, %eax #
@ -83,7 +88,9 @@ protcseg:
call cmain # finish the boot load from C.
# cmain() should not return
spin: jmp spin # ..but in case it does, spin
spin:
jmp spin # ..but in case it does, spin
.p2align 2 # force 4 byte alignment
gdt:

3
bootother.S
View file

@ -21,7 +21,8 @@
.set CR0_PE_ON,0x1 # protected mode enable flag
.globl start
start: .code16 # This runs in real mode
start:
.code16 # This runs in real mode
cli # Disable interrupts
cld # String operations increment

1
ide.c
View file

@ -23,6 +23,7 @@ struct ide_request {
uint nsecs;
uint read;
};
struct ide_request request[NREQUEST];
int head, tail;
struct spinlock ide_lock;

2
setjmp.S
View file

@ -33,5 +33,3 @@ longjmp:
movl $1, %eax /* return value (appears to come from setjmp!) */
ret

8
vectors.pl
View file

@ -13,10 +13,10 @@ for(my $i = 0; $i < 256; $i++){
print ".globl vector$i\n";
print "vector$i:\n";
if(($i < 8 || $i > 14) && $i != 17){
print "\tpushl \$0\n";
print " pushl \$0\n";
}
print "\tpushl \$$i\n";
print "\tjmp alltraps\n";
print " pushl \$$i\n";
print " jmp alltraps\n";
}
print "\n/* vector table */\n";
@ -24,5 +24,5 @@ print ".data\n";
print ".globl vectors\n";
print "vectors:\n";
for(my $i = 0; $i < 256; $i++){
print "\t.long vector$i\n";
print " .long vector$i\n";
}

14
x86.h
View file

@ -88,9 +88,9 @@ static __inline void
cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp)
{
uint eax, ebx, ecx, edx;
asm volatile("cpuid"
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
: "a" (info));
asm volatile("cpuid" :
"=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) :
"a" (info));
if (eaxp)
*eaxp = eax;
if (ebxp)
@ -105,10 +105,10 @@ static __inline uint
cmpxchg(uint oldval, uint newval, volatile uint* lock_addr)
{
uint result;
__asm__ __volatile__(
"lock; cmpxchgl %2, %0"
:"+m" (*lock_addr), "=a" (result) : "r"(newval), "1"(oldval) : "cc"
);
__asm__ __volatile__("lock; cmpxchgl %2, %0" :
"+m" (*lock_addr), "=a" (result) :
"r"(newval), "1"(oldval) :
"cc");
return result;
}