takes one uart input interrupt, then panics
This commit is contained in:
parent
50cbc75102
commit
a9c1a6f742
6 changed files with 108 additions and 6 deletions
19
uart.c
19
uart.c
|
|
@ -1,4 +1,10 @@
|
|||
#include "types.h"
|
||||
#include "param.h"
|
||||
#include "memlayout.h"
|
||||
#include "riscv.h"
|
||||
#include "proc.h"
|
||||
#include "spinlock.h"
|
||||
#include "defs.h"
|
||||
|
||||
//
|
||||
// qemu -machine virt has a 16550a UART
|
||||
|
|
@ -9,12 +15,12 @@
|
|||
//
|
||||
|
||||
// address of one of the registers
|
||||
#define R(reg) ((unsigned int*)(UART0 + 4*(reg)))
|
||||
#define R(reg) ((volatile unsigned char *)(UART0 + reg))
|
||||
|
||||
void
|
||||
uartinit(void)
|
||||
{
|
||||
// disable interrupts
|
||||
// disable interrupts -- IER
|
||||
*R(1) = 0x00;
|
||||
|
||||
// special mode to set baud rate
|
||||
|
|
@ -30,8 +36,11 @@ uartinit(void)
|
|||
// and set word length to 8 bits, no parity.
|
||||
*R(3) = 0x03;
|
||||
|
||||
// reset and enable FIFOs.
|
||||
// reset and enable FIFOs -- FCR.
|
||||
*R(2) = 0x07;
|
||||
|
||||
// enable receive interrupts -- IER.
|
||||
*R(1) = 0x01;
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -40,9 +49,11 @@ uartputc(int c)
|
|||
*R(0) = c;
|
||||
}
|
||||
|
||||
static int
|
||||
uint
|
||||
uartgetc(void)
|
||||
{
|
||||
// XXX this isn't right, must check there's data in the FIFO.
|
||||
return *R(0);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue