#include "types.h"
#include "memlayout.h"
#include "spinlock.h"
#include "defs.h"

// the UART control registers are memory-mapped
// at address UART0. this macro returns the
// address of one of the registers.

#define IER_RX_ENABLE   (1 << 0)
#define IER_TX_ENABLE   (1 << 1)
#define FCR_FIFO_ENABLE (1 << 0)
#define FCR_FIFO_CLEAR  (3 << 1) // clear the content of the two FIFOs
#define LCR_EIGHT_BITS  (3 << 0)
#define LCR_BAUD_LATCH  (1 << 7) // special mode to set baud rate
#define LSR_RX_READY    (1 << 0) // input is waiting to be read from RHR
#define LSR_TX_IDLE     (1 << 5) // THR can accept another character to send

/*
 * Keep in mind that some of these registers share locations, but have different
 * meaning depending on direction
 */
typedef struct {
  volatile u8 rbr_thr_dll; // 0x00: RBR (read), THR (write), DLL (when DLAB=1)
  volatile u8 ier_dlm;     // 0x01: IER (when DLAB=0), DLM (when DLAB=1)
  volatile u8 iir_fcr;     // 0x02: Interrupt Identification Register (read), FIFO Control Register (write)
  volatile u8 lcr;         // 0x03: Line Control Register
  volatile u8 mcr;         // 0x04: Modem Control Register
  volatile u8 lsr;         // 0x05: Line Status Register
  volatile u8 msr;         // 0x06: Modem Status Register
  volatile u8 scr;         // 0x07: Scratch Register
} uart16550_t;

#define UART ((uart16550_t *)UART0)

#define THR rbr_thr_dll
#define RBR rbr_thr_dll
#define DLL rbr_thr_dll
#define IER ier_dlm
#define DLM ier_dlm
#define FCR iir_fcr
#define IIR iir_fcr
#define LCR lcr
#define LSR lsr
#define RHR THR

// TODO: Remove these
#define ReadReg(reg)     ((UART)->reg)
#define WriteReg(reg, v) ((UART)->reg = (v))

// the transmit output buffer.
struct spinlock uart_tx_lock;
#define UART_TX_BUF_SIZE 32
char uart_tx_buf[UART_TX_BUF_SIZE];
u64  uart_tx_w; // write next to uart_tx_buf[uart_tx_w % UART_TX_BUF_SIZE]
u64  uart_tx_r; // read next from uart_tx_buf[uart_tx_r % UART_TX_BUF_SIZE]

extern volatile int panicked; // from printf.c

void uartstart();

void
uartinit(void)
{
  // WriteReg(IER, 0x00);
  UART->ier_dlm = 0x00; // disable interrupts.

  UART->lcr = LCR_BAUD_LATCH; // special mode to set baud rate.
  // WriteReg(LCR, LCR_BAUD_LATCH);

  // LSB for baud rate of 38.4K.
  WriteReg(DLL, 0x03);

  // MSB for baud rate of 38.4K.
  WriteReg(DLL, 0x00);

  // leave set-baud mode,
  // and set word length to 8 bits, no parity.
  WriteReg(LCR, LCR_EIGHT_BITS);

  // reset and enable FIFOs.
  WriteReg(FCR, FCR_FIFO_ENABLE | FCR_FIFO_CLEAR);

  // enable transmit and receive interrupts.
  WriteReg(IER, IER_TX_ENABLE | IER_RX_ENABLE);

  initlock(&uart_tx_lock, "uart");
}

// add a character to the output buffer and tell the
// UART to start sending if it isn't already.
// blocks if the output buffer is full.
// because it may block, it can't be called
// from interrupts; it's only suitable for use
// by write().
void
uartputc(int c)
{
  acquire(&uart_tx_lock);

  if(panicked) {
    for(;;) {}
  }
  while(uart_tx_w == uart_tx_r + UART_TX_BUF_SIZE) {
    // buffer is full.
    // wait for uartstart() to open up space in the buffer.
    sleep(&uart_tx_r, &uart_tx_lock);
  }
  uart_tx_buf[uart_tx_w % UART_TX_BUF_SIZE] = c;
  uart_tx_w += 1;
  uartstart();
  release(&uart_tx_lock);
}

// alternate version of uartputc() that doesn't
// use interrupts, for use by kernel printf() and
// to echo characters. it spins waiting for the uart's
// output register to be empty.
void
uartputc_sync(int c)
{
  push_off();

  if(panicked) {
    for(;;) {}
  }

  // wait for Transmit Holding Empty to be set in LSR.
  while((ReadReg(LSR) & LSR_TX_IDLE) == 0) {}
  WriteReg(THR, c);

  pop_off();
}

// if the UART is idle, and a character is waiting
// in the transmit buffer, send it.
// caller must hold uart_tx_lock.
// called from both the top- and bottom-half.
void
uartstart()
{
  while(1) {
    if(uart_tx_w == uart_tx_r) {
      // transmit buffer is empty.
      return;
    }

    if((ReadReg(LSR) & LSR_TX_IDLE) == 0) {
      // the UART transmit holding register is full,
      // so we cannot give it another byte.
      // it will interrupt when it's ready for a new byte.
      return;
    }

    int c = uart_tx_buf[uart_tx_r % UART_TX_BUF_SIZE];
    uart_tx_r += 1;

    // maybe uartputc() is waiting for space in the buffer.
    wakeup(&uart_tx_r);

    WriteReg(THR, c);
  }
}

// read one input character from the UART.
// return -1 if none is waiting.
int
uartgetc(void)
{
  if(ReadReg(LSR) & 0x01) {
    // input data is ready.
    return ReadReg(RHR);
  } else {
    return -1;
  }
}

// handle a uart interrupt, raised because input has
// arrived, or the uart is ready for more output, or
// both. called from devintr().
void
uartintr(void)
{
  // read and process incoming characters.
  while(1) {
    int c = uartgetc();
    if(c == -1)
      break;
    consoleintr(c);
  }

  // send buffered characters.
  acquire(&uart_tx_lock);
  uartstart();
  release(&uart_tx_lock);
}