445 lines
11 KiB
C
445 lines
11 KiB
C
#include "param.h"
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#include "types.h"
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#include "defs.h"
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#include "x86.h"
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#include "msr.h"
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#include "memlayout.h"
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#include "mmu.h"
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#include "proc.h"
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#include "elf.h"
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#include "traps.h"
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extern char data[]; // defined by kernel.ld
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void sysentry(void);
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static pde_t *kpml4; // kernel address space, used by scheduler and bootup
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// Bootstrap GDT. Used by boot.S but defined in C
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// Map "logical" addresses to virtual addresses using identity map.
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// Cannot share a CODE descriptor for both kernel and user
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// because it would have to have DPL_USR, but the CPU forbids
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// an interrupt from CPL=0 to DPL=3.
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struct segdesc bootgdt[NSEGS] = {
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[0] = SEGDESC(0, 0, 0), // null
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[1] = SEGDESC(0, 0xfffff, SEG_R|SEG_CODE|SEG_S|SEG_DPL(0)|SEG_P|SEG_D|SEG_G), // 32-bit kernel code
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[2] = SEGDESC(0, 0, SEG_R|SEG_CODE|SEG_S|SEG_DPL(0)|SEG_P|SEG_L|SEG_G), // 64-bit kernel code
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[3] = SEGDESC(0, 0xfffff, SEG_W|SEG_S|SEG_DPL(0)|SEG_P|SEG_D|SEG_G), // kernel data
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// The order of the user data and user code segments is
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// important for syscall instructions. See initseg.
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[6] = SEGDESC(0, 0xfffff, SEG_W|SEG_S|SEG_DPL(3)|SEG_P|SEG_D|SEG_G), // 64-bit user data
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[7] = SEGDESC(0, 0, SEG_R|SEG_CODE|SEG_S|SEG_DPL(3)|SEG_P|SEG_L|SEG_G), // 64-bit user code
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};
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// Set up CPU's kernel segment descriptors.
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// Run once on entry on each CPU.
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void
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seginit(void)
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{
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struct cpu *c;
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struct desctr dtr;
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c = mycpu();
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memmove(c->gdt, bootgdt, sizeof bootgdt);
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dtr.limit = sizeof(c->gdt)-1;
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dtr.base = (uint64) c->gdt;
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lgdt((void *)&dtr.limit);
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// When executing a syscall instruction the CPU sets the SS selector
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// to (star >> 32) + 8 and the CS selector to (star >> 32).
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// When executing a sysret instruction the CPU sets the SS selector
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// to (star >> 48) + 8 and the CS selector to (star >> 48) + 16.
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uint64 star = ((((uint64)SEG_UCODE|0x3)- 16)<<48)|((uint64)(SEG_KCODE)<<32);
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writemsr(MSR_STAR, star);
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writemsr(MSR_LSTAR, (uint64)&sysentry);
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writemsr(MSR_SFMASK, FL_TF | FL_IF);
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// Initialize cpu-local storage.
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writegs(SEG_KDATA);
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writemsr(MSR_GS_BASE, (uint64)c);
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writemsr(MSR_GS_KERNBASE, (uint64)c);
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}
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// Return the address of the PTE in page table pgdir
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// that corresponds to virtual address va. If alloc!=0,
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// create any required page table pages.
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static pte_t *
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walkpgdir(pde_t *pml4, const void *va, int alloc)
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{
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pde_t *pgtab = pml4;
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pde_t *pte;
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int level;
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for (level = L_PML4; level > 0; level--) {
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pte = &pgtab[PX(level, va)];
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if(*pte & PTE_P)
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pgtab = (pte_t*)P2V(PTE_ADDR(*pte));
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else {
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if(!alloc || (pgtab = (pte_t*)kalloc()) == 0)
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return 0;
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memset(pgtab, 0, PGSIZE);
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*pte = V2P(pgtab) | PTE_P | PTE_W | PTE_U;
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}
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}
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return &pgtab[PX(level, va)];
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}
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// Create PTEs for virtual addresses starting at va that refer to
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// physical addresses starting at pa. va and size might not
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// be page-aligned.
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static int
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mappages(pde_t *pgdir, void *va, uint64 size, uint64 pa, int perm)
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{
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char *a, *last;
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pte_t *pte;
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a = (char*)PGROUNDDOWN((uint64)va);
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last = (char*)PGROUNDDOWN(((uint64)va) + size - 1);
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for(;;){
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if((pte = walkpgdir(pgdir, a, 1)) == 0)
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return -1;
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if(*pte & PTE_P)
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panic("remap");
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*pte = pa | perm | PTE_P;
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if(a == last)
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break;
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a += PGSIZE;
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pa += PGSIZE;
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}
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return 0;
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}
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// There is one page table per process, plus one that's used when
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// a CPU is not running any process (kpml4). The kernel uses the
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// current process's page table during system calls and interrupts;
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// page protection bits prevent user code from using the kernel's
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// mappings.
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//
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// setupkvm() and exec() set up every page table like this:
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//
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// 0..KERNBASE: user memory (text+data+stack+heap), mapped to
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// phys memory allocated by the kernel
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// KERNBASE..KERNBASE+EXTMEM: mapped to 0..EXTMEM (for I/O space)
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// KERNBASE+EXTMEM..data: mapped to EXTMEM..V2P(data)
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// for the kernel's instructions and r/o data
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// data..KERNBASE+PHYSTOP: mapped to V2P(data)..PHYSTOP,
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// rw data + free physical memory
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// 0xfe000000..0: mapped direct (devices such as ioapic)
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//
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// The kernel allocates physical memory for its heap and for user memory
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// between V2P(end) and the end of physical memory (PHYSTOP)
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// (directly addressable from end..P2V(PHYSTOP)).
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// This table defines the kernel's mappings, which are present in
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// every process's page table.
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static struct kmap {
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void *virt;
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uint64 phys_start;
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uint64 phys_end;
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int perm;
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} kmap[] = {
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{ (void*)KERNBASE, 0, EXTMEM, PTE_W}, // I/O space
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{ (void*)KERNLINK, V2P(KERNLINK), V2P(data), 0}, // kern text+rodata
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{ (void*)data, V2P(data), PHYSTOP, PTE_W}, // kern data+memory
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{ (void*)P2V(DEVSPACE), DEVSPACE, DEVSPACETOP, PTE_W}, // more devices
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};
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// Set up kernel part of a page table.
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pde_t*
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setupkvm(void)
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{
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pde_t *pml4;
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struct kmap *k;
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if((pml4 = (pde_t*)kalloc()) == 0)
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return 0;
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memset(pml4, 0, PGSIZE);
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if (PHYSTOP > DEVSPACE)
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panic("PHYSTOP too high");
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for(k = kmap; k < &kmap[NELEM(kmap)]; k++) {
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if(mappages(pml4, k->virt, k->phys_end - k->phys_start,
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(uint)k->phys_start, k->perm) < 0) {
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freevm(pml4, 0);
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return 0;
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}
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}
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return pml4;
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}
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// Allocate one page table for the machine for the kernel address
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// space for scheduler processes.
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void
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kvmalloc(void)
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{
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kpml4 = setupkvm();
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switchkvm();
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}
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// Switch h/w page table register to the kernel-only page table,
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// for when no process is running.
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void
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switchkvm(void)
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{
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lcr3(V2P(kpml4)); // switch to the kernel page table
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}
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// Switch TSS and h/w page table to correspond to process p.
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void
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switchuvm(struct proc *p)
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{
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struct desctr dtr;
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struct cpu *c;
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if(p == 0)
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panic("switchuvm: no process");
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if(p->kstack == 0)
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panic("switchuvm: no kstack");
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if(p->pgdir == 0)
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panic("switchuvm: no pgdir");
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pushcli();
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c = mycpu();
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uint64 base = (uint64) &(c->ts);
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c->gdt[SEG_TSS>>3] = SEGDESC(base, (sizeof(c->ts)-1), SEG_P|SEG_TSS64A);
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c->gdt[(SEG_TSS>>3)+1] = SEGDESCHI(base);
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c->ts.rsp[0] = (uint64) p->kstack + KSTACKSIZE;
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c->ts.iomba = (ushort) 0xFFFF;
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dtr.limit = sizeof(c->gdt) - 1;
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dtr.base = (uint64)c->gdt;
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lgdt((void *)&dtr.limit);
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ltr(SEG_TSS);
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lcr3(V2P(p->pgdir)); // switch to process's address space
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popcli();
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}
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// Load the initcode into address 0 of pgdir.
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// sz must be less than a page.
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void
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inituvm(pde_t *pgdir, char *init, uint sz)
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{
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char *mem;
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if(sz >= PGSIZE)
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panic("inituvm: more than a page");
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mem = kalloc();
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memset(mem, 0, PGSIZE);
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mappages(pgdir, 0, PGSIZE, V2P(mem), PTE_W|PTE_U);
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memmove(mem, init, sz);
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}
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// Load a program segment into pgdir. addr must be page-aligned
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// and the pages from addr to addr+sz must already be mapped.
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int
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loaduvm(pde_t *pgdir, char *addr, struct inode *ip, uint offset, uint sz)
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{
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uint i, n;
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uint64 pa;
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pte_t *pte;
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if((uint64) addr % PGSIZE != 0)
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panic("loaduvm: addr must be page aligned");
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for(i = 0; i < sz; i += PGSIZE){
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if((pte = walkpgdir(pgdir, addr+i, 0)) == 0)
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panic("loaduvm: address should exist");
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pa = PTE_ADDR(*pte);
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if(sz - i < PGSIZE)
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n = sz - i;
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else
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n = PGSIZE;
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if(readi(ip, P2V(pa), offset+i, n) != n)
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return -1;
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}
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return 0;
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}
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// Allocate page tables and physical memory to grow process from oldsz to
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// newsz, which need not be page aligned. Returns new size or 0 on error.
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int
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allocuvm(pde_t *pgdir, uint oldsz, uint newsz)
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{
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char *mem;
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uint64 a;
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if(newsz >= KERNBASE)
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return 0;
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if(newsz < oldsz)
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return oldsz;
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a = PGROUNDUP(oldsz);
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for(; a < newsz; a += PGSIZE){
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mem = kalloc();
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if(mem == 0){
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deallocuvm(pgdir, newsz, oldsz);
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return 0;
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}
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memset(mem, 0, PGSIZE);
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if(mappages(pgdir, (char*)a, PGSIZE, V2P(mem), PTE_W|PTE_U) < 0){
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deallocuvm(pgdir, newsz, oldsz);
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kfree(mem);
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return 0;
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}
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}
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return newsz;
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}
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// Deallocate user pages to bring the process size from oldsz to
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// newsz. oldsz and newsz need not be page-aligned, nor does newsz
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// need to be less than oldsz. oldsz can be larger than the actual
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// process size. Returns the new process size.
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int
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deallocuvm(pde_t *pml4, uint64 oldsz, uint64 newsz)
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{
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pte_t *pte;
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uint64 a, pa;
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if(newsz >= oldsz)
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return oldsz;
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a = PGROUNDUP(newsz);
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for(; a < oldsz; a += PGSIZE){
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pte = walkpgdir(pml4, (char*)a, 0);
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if(!pte)
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continue;
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else if((*pte & PTE_P) != 0){
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pa = PTE_ADDR(*pte);
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if(pa == 0)
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panic("kfree");
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char *v = P2V(pa);
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kfree(v);
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*pte = 0;
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}
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}
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return newsz;
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}
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// Recursively free a page table
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void
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freelevel(pde_t *pgtab, int level) {
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int i;
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pde_t *pd;
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if (level > 0) {
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for(i = 0; i < NPDENTRIES; i++) {
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if(pgtab[i] & PTE_P){
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pd = (pde_t*)P2V(PTE_ADDR(pgtab[i]));
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freelevel(pd, level-1);
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}
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}
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}
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kfree((char*)pgtab);
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}
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// Free all the physical memory pages
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// in the user part and page table
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void
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freevm(pde_t *pml4, uint64 sz)
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{
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if(pml4 == 0)
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panic("freevm: no pgdir");
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deallocuvm(pml4, sz, 0);
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freelevel(pml4, L_PML4);
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}
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// Clear PTE_U on a page. Used to create an inaccessible
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// page beneath the user stack.
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void
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clearpteu(pde_t *pgdir, char *uva)
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{
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pte_t *pte;
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pte = walkpgdir(pgdir, uva, 0);
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if(pte == 0)
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panic("clearpteu");
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*pte &= ~PTE_U;
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}
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// Given a parent process's page table, create a copy
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// of it for a child.
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pde_t*
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copyuvm(pde_t *pgdir, uint sz)
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{
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pde_t *d;
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pte_t *pte;
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uint64 pa, i;
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uint flags;
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char *mem;
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if((d = setupkvm()) == 0)
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return 0;
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for(i = 0; i < sz; i += PGSIZE){
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if((pte = walkpgdir(pgdir, (void *) i, 0)) == 0)
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panic("copyuvm: pte should exist");
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if(!(*pte & PTE_P))
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panic("copyuvm: page not present");
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pa = PTE_ADDR(*pte);
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flags = PTE_FLAGS(*pte);
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if((mem = kalloc()) == 0)
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goto bad;
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memmove(mem, (char*)P2V(pa), PGSIZE);
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if(mappages(d, (void*)i, PGSIZE, V2P(mem), flags) < 0) {
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kfree(mem);
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goto bad;
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}
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}
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return d;
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bad:
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freevm(d, sz);
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return 0;
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}
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//PAGEBREAK!
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// Map user virtual address to kernel address.
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char*
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uva2ka(pde_t *pgdir, char *uva)
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{
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pte_t *pte;
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pte = walkpgdir(pgdir, uva, 0);
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if((*pte & PTE_P) == 0)
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return 0;
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if((*pte & PTE_U) == 0)
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return 0;
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return (char*)P2V(PTE_ADDR(*pte));
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}
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// Copy len bytes from p to user address va in page table pgdir.
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// Most useful when pgdir is not the current page table.
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// uva2ka ensures this only works for PTE_U pages.
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int
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copyout(pde_t *pgdir, uint va, void *p, uint len)
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{
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char *buf, *pa0;
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uint64 n, va0;
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buf = (char*)p;
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while(len > 0){
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va0 = (uint)PGROUNDDOWN(va);
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pa0 = uva2ka(pgdir, (char*)va0);
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if(pa0 == 0)
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return -1;
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n = PGSIZE - (va - va0);
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if(n > len)
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n = len;
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memmove(pa0 + (va - va0), buf, n);
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len -= n;
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buf += n;
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va = va0 + PGSIZE;
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}
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return 0;
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}
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//PAGEBREAK!
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// Blank page.
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//PAGEBREAK!
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// Blank page.
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//PAGEBREAK!
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// Blank page.
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