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Figure out core count in a somewhat sane manner

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Imbus 2025-08-27 22:07:56 +02:00
parent 97c13200d2
commit 0562c2fe5a
1 changed files with 25 additions and 6 deletions
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31
start.c
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@ -18,9 +18,14 @@ char stack0[4096 * NCPU] __attribute__((aligned(16)));
/* Keep this here and sync on it until we have synchronized printf */ /* Keep this here and sync on it until we have synchronized printf */
spinlock_t sl = {0}; spinlock_t sl = {0};
volatile int hold = 1; volatile int hold = 1;
volatile int max_hart = 0;
/* This is where entry.S drops us of. All cores land here */ /* This is where entry.S drops us of. All cores land here */
void start() { void start() {
// Do this first
__sync_fetch_and_add(&max_hart, 1);
__sync_synchronize();
u64 id = read_mhartid(); u64 id = read_mhartid();
// Keep each CPU's hartid in its tp (thread pointer) register, for cpuid(). // Keep each CPU's hartid in its tp (thread pointer) register, for cpuid().
@ -35,15 +40,29 @@ void start() {
uart_puts("Hello Neptune!\n"); uart_puts("Hello Neptune!\n");
spinlock_init(&sl); spinlock_init(&sl);
hold = 0; hold = 0;
} else {
while (hold);
} }
while (hold); // spin_lock(&sl);
//
// uart_puts("Hart number: ");
// uart_putc(id + '0');
// uart_putc('\n');
//
// spin_unlock(&sl);
spin_lock(&sl); if (id == 0) {
uart_puts("Hart number: "); spin_lock(&sl);
uart_putc(id + '0'); uart_puts("Core count: ");
uart_putc('\n'); uart_putc(max_hart + '0');
spin_unlock(&sl); uart_putc('\n');
if (max_hart == NCPU) {
uart_puts("All cores up!");
uart_putc('\n');
}
spin_unlock(&sl);
}
// We should not arrive here, but if we do, hang in a while on wfi. // We should not arrive here, but if we do, hang in a while on wfi.
while (1) __asm__ volatile("wfi"); // (Wait For Interrupt) while (1) __asm__ volatile("wfi"); // (Wait For Interrupt)