riscv.h architecture specific routines, startcode now branches hartid=0 for initialziation and hangs the other cores

riscv.h

@@ -0,0 +1,8 @@
+#include <types.h>
+
+/** Returns the current hart id */
+static inline u64 r_mhartid() {
+    u64 x;
+    asm volatile("csrr %0, mhartid" : "=r"(x));
+    return x;
+}

start.c

@@ -1,3 +1,6 @@
+#include <riscv.h>
+#include <types.h>
+
 /*
  * Number of CPU's For now, this is hard-coded here. It will likely be in a
  * header, or dynamically discovered in the future
@@ -25,7 +28,14 @@ char stack0[4096 * NCPU] __attribute__((aligned(16)));
 
 /* This is where entry.S drops us of. All cores land here */
 void start() {
-    uart_puts("Hello Neptune!\n");
+
+    u64 a = r_mhartid();
+    if(a == 0) {
+        uart_puts("Hello Neptune!\n");
+        uart_puts("Core number: ");
+        uart_putc(a + '0');
+        uart_putc('\n');
+    }
 
     /* Here we will do a bunch of initialization steps */