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riscv.h architecture specific routines, startcode now branches hartid=0 for initialziation and hangs the other cores

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Imbus 2025-06-26 04:21:51 +02:00
parent 567e79a4e8
commit 50a3c8d1d9
2 changed files with 19 additions and 1 deletions
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8
riscv.h Normal file
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@ -0,0 +1,8 @@
#include <types.h>
/** Returns the current hart id */
static inline u64 r_mhartid() {
u64 x;
asm volatile("csrr %0, mhartid" : "=r"(x));
return x;
}

10
start.c
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@ -1,3 +1,6 @@
#include <riscv.h>
#include <types.h>
/* /*
* Number of CPU's For now, this is hard-coded here. It will likely be in a * Number of CPU's For now, this is hard-coded here. It will likely be in a
* header, or dynamically discovered in the future * header, or dynamically discovered in the future
@ -25,7 +28,14 @@ char stack0[4096 * NCPU] __attribute__((aligned(16)));
/* This is where entry.S drops us of. All cores land here */ /* This is where entry.S drops us of. All cores land here */
void start() { void start() {
u64 a = r_mhartid();
if(a == 0) {
uart_puts("Hello Neptune!\n"); uart_puts("Hello Neptune!\n");
uart_puts("Core number: ");
uart_putc(a + '0');
uart_putc('\n');
}
/* Here we will do a bunch of initialization steps */ /* Here we will do a bunch of initialization steps */