3 commits

Author	SHA1	Message	Date
Imbus	58bface3c9	Fix nasty bug related to spinlock panic when lock is already held, because the tread pointer was never set on a per-hart basis.	2025-06-26 06:24:01 +02:00
Imbus	a9f7cb8cf7	Some machine specific code for reading and writing registers	2025-06-26 05:57:05 +02:00
Imbus	50a3c8d1d9	riscv.h architecture specific routines, startcode now branches hartid=0 for initialziation and hangs the other cores	2025-06-26 04:21:51 +02:00