Initial scheduler

Fix TSS

Also change to .{} syntax where appropriate.
Added the SS segment
Fixed spelling

Refactoring GDT


Multitasking working for now


WIP scheduler

Refactored Bitmap a bit

WIP still


Task switching working

Handlers return the stack pointer that will be used to restore the tasks stack, normal handlers will return the same stack pointer it was called with where task switching will return the stack pointer of the next task and restore its state using the interrupt stub.

Initial scheduler done


Created a stage 2 init task


Change u32 to usize


Move Task to arch specific


WIP


WIP2


Removed esp from task, replaced with stack_pointer


Removed the debug logs


Fixed init task stack


Change pickNextTask to pointer manipulation

This allows less allocations so faster switching

Temporary enable interrupts for some runtime tests

PIT and RTC need interrupts enabled to run their runtime tests

Renamed schedule => pickNextTask, comptime bitmap for pids not task init

And some other stuff: No pub for the task anymore
Use the leak detector allocator

Fmt


Fix unit tests

And some other stuff :P

PR review

Moved Task out of arch and have the stack init in the arch file
Mocking clean up
Removed commented code
Renamed createTask to scheduleTask where the user will have to provide a task to schedule
Removed redundant pub in log runtime test
Removed global allocator for scheduler
Cleaner assembly in paging

Fmt


Added new Scheduler test mode


Added new test mode to CI


Removed one of the prints


Added doc comment, task test for i386


Removed test


WIP


Runtime tests work

Have a global set in one task and reacted to in another. Also test that local variables are preserved after a task switch.

Removed new lines


Increased line length


Move the allocation of the bool above the task creation

src/kernel/arch/x86/rtc.zig

@@ -6,13 +6,14 @@ const expectEqual = std.testing.expectEqual;
 const expectError = std.testing.expectError;
 const build_options = @import("build_options");
 const mock_path = build_options.arch_mock_path;
-const arch = @import("arch.zig");
+const arch = if (is_test) @import(mock_path ++ "arch_mock.zig") else @import("arch.zig");
 const log = @import("../../log.zig");
 const pic = @import("pic.zig");
 const pit = @import("pit.zig");
 const irq = @import("irq.zig");
 const cmos = if (is_test) @import(mock_path ++ "cmos_mock.zig") else @import("cmos.zig");
 const panic = if (is_test) @import(mock_path ++ "panic_mock.zig").panic else @import("../../panic.zig").panic;
+const scheduler = @import("../../scheduler.zig");
 
 /// The Century register is unreliable. We need a APIC interface to infer if we have a century
 /// register. So this is a current TODO.
@@ -44,6 +45,8 @@ const RtcError = error{
 /// The number of ticks that has passed when RTC was initially set up.
 var ticks: u32 = 0;
 
+var schedule: bool = true;
+
 ///
 /// Checks if the CMOS chip isn't updating the RTC registers. Call this before reading any RTC
 /// registers so don't get inconsistent values.
@@ -206,14 +209,26 @@ fn readRtc() DateTime {
 /// The interrupt handler for the RTC.
 ///
 /// Arguments:
-///     IN ctx: *arch.InterruptContext - Pointer to the interrupt context containing the contents
+///     IN ctx: *arch.CpuState - Pointer to the interrupt context containing the contents
 ///                                      of the register at the time of the interrupt.
 ///
-fn rtcHandler(ctx: *arch.InterruptContext) void {
+fn rtcHandler(ctx: *arch.CpuState) usize {
     ticks +%= 1;
 
+    var ret_esp: usize = undefined;
+
+    // Call the scheduler
+    if (schedule) {
+        ret_esp = scheduler.pickNextTask(ctx);
+    } else {
+        ret_esp = @ptrToInt(ctx);
+    }
+
     // Need to read status register C
+    // Might need to disable the NMI bit, set to true
     const reg_c = cmos.readStatusRegister(cmos.StatusRegister.C, false);
+
+    return ret_esp;
 }
 
 ///
@@ -264,9 +279,6 @@ pub fn init() void {
         },
     };
 
-    // Need to disable interrupts went setting up the RTC
-    arch.disableInterrupts();
-
     // Set the interrupt rate to 512Hz
     setRate(7) catch |err| switch (err) {
         error.RateError => {
@@ -277,9 +289,6 @@ pub fn init() void {
     // Enable RTC interrupts
     enableInterrupts();
 
-    // Can now enable interrupts
-    arch.enableInterrupts();
-
     // Read status register C to clear any interrupts that may have happened during set up
     const reg_c = cmos.readStatusRegister(cmos.StatusRegister.C, false);
 
@@ -739,7 +748,15 @@ fn rt_interrupts() void {
 ///
 /// Run all the runtime tests.
 ///
-fn runtimeTests() void {
+pub fn runtimeTests() void {
     rt_init();
+
+    // Disable the scheduler temporary
+    schedule = false;
+    // Interrupts aren't enabled yet, so for the runtime tests, enable it temporary
+    arch.enableInterrupts();
     rt_interrupts();
+    arch.disableInterrupts();
+    // Can enable it back
+    schedule = true;
 }