196 lines
4.9 KiB
C
196 lines
4.9 KiB
C
#include "types.h"
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#include "memlayout.h"
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#include "spinlock.h"
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#include "defs.h"
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// the UART control registers are memory-mapped
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// at address UART0. this macro returns the
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// address of one of the registers.
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#define IER_RX_ENABLE (1 << 0)
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#define IER_TX_ENABLE (1 << 1)
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#define FCR_FIFO_ENABLE (1 << 0)
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#define FCR_FIFO_CLEAR (3 << 1) // clear the content of the two FIFOs
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#define LCR_EIGHT_BITS (3 << 0)
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#define LCR_BAUD_LATCH (1 << 7) // special mode to set baud rate
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#define LSR_RX_READY (1 << 0) // input is waiting to be read from RHR
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#define LSR_TX_IDLE (1 << 5) // THR can accept another character to send
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/*
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* Keep in mind that some of these registers share locations, but have different
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* meaning depending on direction
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*/
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typedef struct {
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volatile u8 rbr_thr_dll; // 0x00: RBR (read), THR (write), DLL (when DLAB=1)
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volatile u8 ier_dlm; // 0x01: IER (when DLAB=0), DLM (when DLAB=1)
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volatile u8 iir_fcr; // 0x02: Interrupt Identification Register (read), FIFO Control Register (write)
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volatile u8 lcr; // 0x03: Line Control Register
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volatile u8 mcr; // 0x04: Modem Control Register
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volatile u8 lsr; // 0x05: Line Status Register
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volatile u8 msr; // 0x06: Modem Status Register
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volatile u8 scr; // 0x07: Scratch Register
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} uart16550_t;
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#define UART ((uart16550_t *)UART0)
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#define THR rbr_thr_dll
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#define RBR rbr_thr_dll
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#define DLL rbr_thr_dll
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#define IER ier_dlm
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#define DLM ier_dlm
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#define FCR iir_fcr
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#define IIR iir_fcr
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#define LCR lcr
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#define LSR lsr
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#define RHR THR
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// TODO: Remove these
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#define ReadReg(reg) ((UART)->reg)
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#define WriteReg(reg, v) ((UART)->reg = (v))
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// the transmit output buffer.
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struct spinlock uart_tx_lock;
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#define UART_TX_BUF_SIZE 32
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char uart_tx_buf[UART_TX_BUF_SIZE];
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u64 uart_tx_w; // write next to uart_tx_buf[uart_tx_w % UART_TX_BUF_SIZE]
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u64 uart_tx_r; // read next from uart_tx_buf[uart_tx_r % UART_TX_BUF_SIZE]
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extern volatile int panicked; // from printf.c
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void uartstart();
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void
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uartinit(void)
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{
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// WriteReg(IER, 0x00);
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UART->ier_dlm = 0x00; // disable interrupts.
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UART->lcr = LCR_BAUD_LATCH; // special mode to set baud rate.
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// WriteReg(LCR, LCR_BAUD_LATCH);
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// LSB for baud rate of 38.4K.
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WriteReg(DLL, 0x03);
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// MSB for baud rate of 38.4K.
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WriteReg(DLL, 0x00);
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// leave set-baud mode,
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// and set word length to 8 bits, no parity.
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WriteReg(LCR, LCR_EIGHT_BITS);
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// reset and enable FIFOs.
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WriteReg(FCR, FCR_FIFO_ENABLE | FCR_FIFO_CLEAR);
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// enable transmit and receive interrupts.
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WriteReg(IER, IER_TX_ENABLE | IER_RX_ENABLE);
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initlock(&uart_tx_lock, "uart");
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}
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// add a character to the output buffer and tell the
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// UART to start sending if it isn't already.
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// blocks if the output buffer is full.
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// because it may block, it can't be called
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// from interrupts; it's only suitable for use
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// by write().
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void
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uartputc(int c)
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{
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acquire(&uart_tx_lock);
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if(panicked) {
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for(;;) {}
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}
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while(uart_tx_w == uart_tx_r + UART_TX_BUF_SIZE) {
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// buffer is full.
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// wait for uartstart() to open up space in the buffer.
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sleep(&uart_tx_r, &uart_tx_lock);
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}
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uart_tx_buf[uart_tx_w % UART_TX_BUF_SIZE] = c;
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uart_tx_w += 1;
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uartstart();
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release(&uart_tx_lock);
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}
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// alternate version of uartputc() that doesn't
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// use interrupts, for use by kernel printf() and
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// to echo characters. it spins waiting for the uart's
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// output register to be empty.
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void
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uartputc_sync(int c)
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{
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push_off();
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if(panicked) {
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for(;;) {}
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}
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// wait for Transmit Holding Empty to be set in LSR.
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while((ReadReg(LSR) & LSR_TX_IDLE) == 0) {}
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WriteReg(THR, c);
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pop_off();
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}
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// if the UART is idle, and a character is waiting
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// in the transmit buffer, send it.
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// caller must hold uart_tx_lock.
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// called from both the top- and bottom-half.
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void
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uartstart()
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{
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while(1) {
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if(uart_tx_w == uart_tx_r) {
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// transmit buffer is empty.
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return;
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}
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if((ReadReg(LSR) & LSR_TX_IDLE) == 0) {
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// the UART transmit holding register is full,
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// so we cannot give it another byte.
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// it will interrupt when it's ready for a new byte.
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return;
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}
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int c = uart_tx_buf[uart_tx_r % UART_TX_BUF_SIZE];
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uart_tx_r += 1;
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// maybe uartputc() is waiting for space in the buffer.
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wakeup(&uart_tx_r);
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WriteReg(THR, c);
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}
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}
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// read one input character from the UART.
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// return -1 if none is waiting.
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int
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uartgetc(void)
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{
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if(ReadReg(LSR) & 0x01) {
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// input data is ready.
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return ReadReg(RHR);
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} else {
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return -1;
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}
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}
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// handle a uart interrupt, raised because input has
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// arrived, or the uart is ready for more output, or
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// both. called from devintr().
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void
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uartintr(void)
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{
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// read and process incoming characters.
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while(1) {
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int c = uartgetc();
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if(c == -1)
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break;
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consoleintr(c);
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}
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// send buffered characters.
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acquire(&uart_tx_lock);
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uartstart();
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release(&uart_tx_lock);
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}
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